The present invention relates to semiconductor memory, and more particularly, to a flash memory device and a method of erasing a flash memory device.
Semiconductor memory devices are generally classified into volatile semiconductor memory devices and nonvolatile semiconductor memory devices. An advantage of volatile semiconductor memory devices is that read and write speeds are fast and a disadvantage is that stored contents are lost when power is removed. In comparison, nonvolatile semiconductor memory devices retain stored contents even when power is turned off. Therefore, nonvolatile semiconductor memory devices may be used for applications that require contents to be stored regardless of whether power is on. Nonvolatile semiconductor memory devices may include, for example, mask read-only memory (MROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and the like.
Among non-volatile semiconductor memories, however, MROM, PROM and EPROM cannot be erased and written to by a system itself, so it is difficult for general users to update stored contents. In contrast, EEPROM is capable of being electrically erased or written. Therefore, uses of EEPROM applications have expanded to auxiliary memories or system programming requiring frequent or continuous updates (e.g., flash EEPROM). A flash EEPROM, in particular, exhibits a higher degree of integration than a conventional EEPROM, and thus is particularly suitable for large auxiliary memory applications. A NAND-type flash EEPROM (referred to as a NAND flash memory device) enables a higher degree of integration than other types of flash EEPROMs.
A flash memory device is an integrated circuit capable of storing information and reading stored information, as needed. A flash memory device may include multiple memory cells that are rewritable. Each memory cell may store one-bit data or multi-bit data. A flash memory device has increased functionality through high integration, volume and chip size.
Recently, to meet the need for large memory devices, multi-bit memory devices have been developed that are capable of storing multi-bit data per cell. When one-bit data is stored in a memory cell, the memory cell may have one of two threshold voltage distributions, i.e., a threshold voltage distribution corresponding to data “1” or data “0.” When two-bit data are stored in a memory cell, the memory cell may have one of four possible threshold voltage distributions. Further, when three-bit data are stored in a memory cell, the memory cell may have one of eight possible threshold voltage distributions. Endeavors have been made to store four-bit data per cell, which further increases the number of possible threshold voltage distributions.
In multi-bit flash memory devices, threshold voltage distributions/states corresponding to 2M (where M is a data bit number) may be distributed within a limited threshold voltage window. Accordingly, improved program and erase techniques are needed to efficiently program memory cells to any one of threshold voltage distributions within a limited threshold voltage window.